原厂供应车充集成电路DC-DC大电流车充方案DP1800

DP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com -1-/11 Rev.1.1免费提供样品、方案开发以及技术支持，欢迎来电咨询：188243 18367    QQ：2153 472041冷先生        FEATURESlLow Cost Solution Built-in 800V power BJTlQuasi-Resonant Primary Side Regulation(QR-PSR) Control with High EfficiencylMulti-Mode PSR ControllFast Dynamic ResponselBuilt-in Dynamic Base DrivelAudio Noise Free Operationl ±4% CC and CV RegulationlLow Standby Power <70mWlProgrammable Cable Drop Compensation(CDC) in CV ModelBuilt-in AC Line & Load CC CompensationlBuild in Protections:nShort Load Protection (SLP)nCycle-by-Cycle Current LimitingnLeading Edge Blanking (LEB)nPin Floating ProtectionnVDD OVP & UVP & ClampnOver temperature protection(OTP)lAvailable with DP1800 Versions in SOP-7PackageAPPLICATIONSlBattery Chargers for Cellular PhoneslAC/DC Power Adapter and LED LightingsGENERAL DESCRIPTIONDP1800 is a high performance Quasi Resonant(QR) Primary Side Regulation (PSR) PWM powerswitch with high precision CV/CC control ideal forcharger applications.In CV mode, DP1800 adopts Multi Mode QRControl which uses the hybrid of AM (AmplitudeModulation) mode and (Frequency Modulation)FM mode to improve system efficiency andreliability. In CC mode, the IC uses PFM controlwith line and load CC compensation. The IC canachieve fast dynamic response. The built-in CableDrop Compensation (CDC) function can provideexcellent CV performance.DP1800 integrates functions and protections ofUnder Voltage Lockout (UVLO), VDD over VoltageProtection (VDD OVP), Cycle-by-cycle CurrentLimiting (OCP), Short Load Protection (SLP), OnChip Thermal Shutdown, VDD Clamping, etc.TYPICAL APPLICATION CIRCUIT免费提供样品、方案开发以及技术支持，欢迎来电咨询：188243 18367    QQ：2153 472041冷先生DP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com -2-/11 Rev.1.1Pin ConfigurationMarking InformationDP1800 for product name;XXXXXX The first X reresents the last year,2014 is 4; The second X represents the month, in A-L 12letters;The third and fourth X on behalf of the date, 01-31 said; The last two X represents the waferbatch code.Pin Description (DP1800)

DP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com -3-/11 Rev.1.1Block DiagramDP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com -4-/11 Rev.1.1Absolute Maximum Ratings(Note 1)

Recommended Operation Conditions(Note 2)

ELECTRICAL CHARACTERISTICS(TA= 25OC, VDD=20V, if not otherwise noted)

免费提供样品、方案开发以及技术支持，欢迎来电咨询：188243 18367    QQ：2153 472041冷先生DP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com -5-/11 Rev.1.1

Note1.Stresses listed as the above "Maximum Ratings" may cause permanent damage to the device. These are forstress ratings. Functional operation of the device at these or any other conditions beyond those indicated in theoperational sections of the specifications is not implied. Exposure to maximum rating conditions for extended periods mayremain possibility to affect device reliability.Note2.The device is not guaranteed to function outside its operating conditions.Note3.Guaranteed by the Design.免费提供样品、方案开发以及技术支持，欢迎来电咨询：188243 18367    QQ：2153 472041冷先生DP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com -6-/11 Rev.1.1CHARACTERIZATION PLOTSDP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com -7-/11 Rev.1.1PERATION DESCRIPTIONDP1800 is a high performance, multi mode, highlyintegrated Quasi Resonant Primary SideRegulation (QR-PSR) power switch. The built-inhigh precision CV/CC control with high levelprotection features makes it suitable for offlinesmall power converter applications.lSystem Start-Up OperationBefore the IC starts to work, it consumes onlystartup current (typically 3uA) which allows a largevalue startup resistor to be used to minimize thepower loss and the current flowing through thestartup resistor charges the VDD hold-up capacitorfrom the high voltage DC bus. When VDD reachesUVLO turn-on voltage of 8.8V (typical), DP1800begins switching and the IC operation current isincreased to be 0.8mA (typical). The hold-upcapacitor continues to supply VDD before theauxiliary winding of the transformer takes thecontrol of VDD voltage.Fig.1Once DP1800 enters very low frequency FM(Frequency Modulation) mode, the operatingcurrent is reduced to be 500uA typically, whichhelps to reduce the standby power loss.lQuasi Resonant PSR CV Modulation(QR-CVM)In Primary Side Regulation (PSR) control, theoutput voltage is sensed on the auxiliary windingduring the transfer of transformer energy to thesecondary. Fig.2 illustrates the timing waveform ofCV sampling signal, demagnetization signal (DEM)and quasi-resonant (QR) trigger signal in DP1800.When the CV sampling process is over, the internalsample/hold (S&H) circuit captures the error signaland amplifies it through the internal Error Amplifier(EA). The output of EA is sent to the QuasiResonant PSR CV Modulator (QR-CVM) for CVregulation. A valley is selected to trigger new PWMcycle by the output of the QR-CVM bock, which isdetermined by the load. The internal referencevoltage for EA is trimmed to 1.3V with highaccuracy.Fig.2During the CV sampling process, an internalvariable current source is flowing to FB pin forCable Drop Compensation (CDC). Thus, there isa step at FB pin in the transformerdemagnetization process, as shown in Fig.2.Fig.2 also illustrates the equation for免费提供样品、方案开发以及技术支持，欢迎来电咨询：188243 18367    QQ：2153 472041冷先生DP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com -8-/11 Rev.1.1“demagnetization plateau”, where Vo and VF isthe output voltage and diode forward voltage; R1and R2 is the resistor divider connected from theauxiliary winding to FB Pin, Ns and Na aresecondary winding and auxiliary windingrespectively.When heavy load condition, the Mode Selector(as shown in “Block Diagram”) based on EAoutput will switch to CC Mode automatically.lPSR Constant Current Modulation(PSR-CCM)Timing information at the FB pin and currentinformation at the CS pin allow accurate regulationof the secondary average current. The control lawdictates that as power is increased in CV regulationand approaching CC regulation the primary peakcurrent is at Ipp(max), as shown in Fig.3.Fig.3Referring to Fig.3 above, the primary peak current,transformer turns ratio, secondary demagnetizationtime (Tdem), and switching period (Tsw)determines the secondary average output currentIout. Ignoring leakage inductance effects, theequation for average output current is shown inFig.3. When the average output current Ioutreaches the regulation reference in the PrimarySide Constant Current Modulator (PSR-CCM) block,the IC operates in pulse frequency modulation(PFM) mode to control the output current at anyoutput voltage at or below the voltage regulationtarget as long as the auxiliary winding can keepVDD above the UVLO turn-off threshold.In DP1800, the ratio between Tdem and Tsw in CCmode is4/7. Therefore, the average output currentcan be expressed as:) (´ ´ @ Rcs(W)500mVN27I mACC_OUTIn the equation above,N----The turn ratio of primary side winding tosecondary side winding.Rcs--- the sensing resistor connected between thepower BJT emitter to GND.lMulti Mode Control in CV ModeTo meet the tight requirement of averaged systemefficiency and no load power consumption, a hybridof frequency modulation (FM) and amplitudemodulation (AM) is adopted in DP1800 which isshown in the Fig 4.Around the full load, the system operates in FMmode. When normal to light load conditions, the ICoperates in FM+AM mode to achieve excellentregulation and high efficiency. When the system isnear zero loading, the IC operates in FM again forstandby power reduction. In this way, the no-loadconsumption can be less than 70mW.免费提供样品、方案开发以及技术支持，欢迎来电咨询：188243 18367    QQ：2153 472041冷先生DP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com -9-/11 Rev.1.1Fig.4lProgrammable Cable DropCompensation (CDC) in CV ModeIn smart phone charger application, the battery isalways connected to the adapter with a cable wirewhich can cause several percentages of voltagedrop on the actual battery voltage. In DP1800, anoffset voltage is generated at FB pin by an internalcurrent source (modulated by CDC block, as shownin Fig.5) flowing into the resistor divider. Thecurrent is proportional to the switching period, thus,it is inversely proportional to the output power Pout.Therefore, the drop due the cable loss can becompensated. As the load decreases from fullloading to zero loading, the offset voltage at FB pinwill increase. By adjusting the resistance of R1 andR2 (as shown in Fig.), the cable loss compensationcan be programmed. The percentage of maximumcompensation is given by) (100%VIcable_max R1//R2VoutV(cable)FB_REF´´»DFor example, R1=3K Ω , R2=18K Ω , Thepercentage of maximum compensation is given by:) (100% 7.7%2V60uA 3K//18KVoutV(cable)= ´´=DFig.5lOptimized Dynamic ResponseIn DP1800, the dynamic response performance isoptimized to meet USB charge requirements.lOn Chip Thermal Shutdown (OTP)When the IC temperature is over 155 oC, the ICshuts down. Only when the IC temperature drops to140 oC, IC will restart.lAudio Noise Free OperationAs mentioned above, the multi-mode CV controlwith a hybrid of FM and AM provides frequencymodulation. An internal current source flowing toCS pin realizes CS peak voltage modulation. InDP1800, the optimized combination of frequencymodulation and CS peak voltage modulationalgorithm can provide audio noise free operationfrom full loading to zero loading.lDynamicBJT Base DriveDP1800 drives a power BJT with dynamic basedrive control to optimize efficiency. The BJT baseDP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com -10-/11 Rev.1.1drive current ranges from 12mA to 35mA (typical),and is dynamically controlled according to thepower supply load change. The higher the outputpower, the higher the based current. Specifically,the base current is related to CS peak voltage, asshown in Fig.6Fig.6lShort Load Protection (SLP)In DP1800, the output is sampled on FB pin andthen compared with a threshold of UVP (0.45Vtypically) after an internal blanking time (36mstypical).In DP1800, when sensed FB voltage is below0.45V, the IC will enter into Short Load Protection(SLP) mode, in which the IC will enter into autorecovery protection mode.lVDD Over Voltage Protection (OVP) andZener ClampWhen VDD voltage is higher than 24.5V (typical),the IC will stop switching. This will cause VDD falldown to be lower than VDD_OFF (typical 3.5V) andthen the system will restart up again. An internal30V (typical) zener clamp is integrated to preventthe IC from damage.免费提供样品、方案开发以及技术支持，欢迎来电咨询：188243 18367    QQ：2153 472041冷先生DP1800Quasi-Resonant PSR CC/CV PWM Power Switchwww.depuw.com Rev.1.011Package Dimension

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